Markus Petri
OFDM, high-performance baseband processor, EASY-A project
In this paper, the hardware architecture of a new configurable OFDM baseband processor supporting data rates up to 4 Gbps is presented. The processor is based on a modular design approach and a highly parallelized streaming architecture. The modular approach allows easily substituting building blocks without much effort. By simply increasing the parallelization factor or the clock rate, the processor scales up to support higher data rates. Additionally, it is possible to change subcarrier mappings, pilot positions and the preamble structure without any hardware changes. After the complete implementation on a high-performance FPGA platform, the baseband processor was successfully used in a wireless 60 GHz OFDM demonstrator.
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