S. Faruque, N. Kaabouch, and A. Dhirde (USA)
FECC, FPGA, Orthogonal Codes Convolution
A method of Forward Error Correction Coding (FECC), based on orthogonal codes, has been developed and realized by means of Field Programmable Gate Array (FPGA). The proposed technique maps a k-bit data block into an n-bit bi-orthogonal code block (n>k) and transmits the coded block across the channel. Construction of rate ½ and rate ¾ orthogonal coded modulation schemes are realized by means of FPGA. The results confirm that the proposed block coding technique can detect and correct errors with bandwidth efficiency.
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