E. Avignon, S. Guessab, R. Kielbasa, J.-M. Guebhard, N. Fel, and J. Russat (France)
Analog-digital conversion, Delta-sigma Modulator, GaAs circuits.
This paper presents the design of a monobit 6th order delta-sigma modulator in a GaAs 0.2 µm technology. The central frequency is 750 MHz and the sampling frequency is 3 GHz. The reached resolution is 10.5 bits over a 10 MHz bandwith. The modulator operates from ± 5 V power supplies and consumes 5.7 W. Each block of the modulator is presented at transistor level. Two drawbacks are pointed out: low pass terms of Gm-LC resonators and the lowpass characteristic of the adder. Two solutions are proposed. Finally, simulation results of the complete modulator are given.
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