An Improved Hybrid Analog-to-Digital Converter Architecture using RSD-Cyclic and Sigma-Delta Architectures

Y.H. Atris and L.D. Paarmann (USA)


Over-sampling, RSD-cyclic algorithm, analog-to-digital conversion


Based on the hybrid architecture introduced by the authors [5] an improved hybrid analog to digital converter architecture is introduced. The hybrid RSD-cyclic-sigma delta architecture is a combination of the RSD-cyclic A/D and sigma-delta A/D architectures. The resolution obtained with this hybrid architecture is SDLRSD LSBMSBn += , where RSDMSBn =1 stands for the most significant bits obtained from the RSD architecture and SDLLSBn =2 stands for the least significant bits obtained from the sigma-delta architecture. This architecture reduces the over-sampling ratio needed for the sigma-delta block and sets less stringent requirements on the analog blocks for the RSD cyclic block. However, an n1-bit DAC and a difference circuit are needed in this architecture. This improved approach as compared to the hybrid architecture in [5] integrates the front-end anti-alias filter into the difference circuit thus eliminating the need for such a filter. In this work we will discuss the improved hybrid architecture and it’s performance as compared to the sigma-delta and RSD-cyclic architecture and analyze the requirements on the sigma-delta, RSD-cyclic, DAC and difference circuit all based on a differential circuit implementation. . CATEGORIES AND SUBJECT DESCRIPTORS [Data Converter]: Delta-sigma , RSD-cyclic, algorithmic architecture GENERAL TERMS Algorithms, Design, Verification

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