Two Proposals for CMOS V-I Converters with Optimized Linearity

A.J. Lopez-Martin (Spain, USA), J. Ramirez-Angulo (USA), and R.G. Carvajal (USA, Spain)


CMOS Analog Integrated Circuits, Transconductors, Voltage-to-Current Converters


Two proposals for CMOS voltage-to-current converters with high linearity are presented. They achieve V-I conversion with passive resistors, and use two second generation current conveyors to convey the resistor currents to the high-impedance output. Both circuits have been fabricated in a 0.5-µm CMOS technology and measured. The circuits consume 3 mW using a dual supply voltage of ±1.5V and require a silicon area of 0.07mm2 .

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