G. Buskes and M. Cantoni (Australia)
Model reduction, circuit simulation, descriptor models.
The application of balanced truncation order reduction, which admits an a priori error bound that holds over all fre quencies, is investigated within the context of large-scale circuit models. Although balanced truncation is well un derstood for models expressed in regular state-space form, automatable circuit modelling techniques, such as Modified Nodal Analysis (MNA), often yield models in a so-called de scriptor form, which is not directly amenable to standard bal anced truncation order reduction. It is shown in this paper that, for a class of lumped circuit networks, a model that is amenable to balanced truncation can be obtained via com putationally inexpensive manipulation of the standard MNA formulation. A corresponding procedure for balanced trun cation is suggested.
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