A. Satheesh, S. Krishnaveni, and S. Ponkarthick
[1] V. Balakrishnan, R. Kokku, A. Kunze, H. Vin et al., Supporting run-time adaptation in packet processing system, IntelResearch and Development, University of Texas at Austin, Technical Report, 2004. [2] D. McEuen, Network processor revenues climb from obscurity in 1999 to $2.9 billion by 2004, In-stat MDR, Press Release, March 6, 2000. [3] I.A. Troxel, A.D. George, & S. Oral, Design and analysis of a dynamically reconfigurable network processor, FL Proc. 27th Ann. IEEE Conf. on Local Computer Networks (LCN.02), Florida Univ., Gainesville, FL, USA, November 2002, 483–492. [4] E. Rothfus, Building next generation network processors, Agere, White Paper, 1999. [5] IXP2400 Development tools user’s guide, June 2001, Intel Corporation. [6] IXP2400 Hardware reference manual, June 2001, Intel Corporation. [7] Intel IXP2400/IXP2800 Network Processors, Intel XScale core support libraries reference manual, November 2003. [8] A. Raghunath, A. Kunze, E.J. Johnson, & V. Balakrishnan, Framework for supporting multi-service edge packet processing on network processors, ANCS’05, October 26–28, Princeton, New Jersey, USA, 2005. [9] G. Coulson, G. Blair, P. Grace, A. Joolia et al., A component model for building systems software, IASTED 2004,Cambridge, MA, USA, 2004. [10] K. Lee, G. Coulson, G. Blair, A. Joolia, & J. Ueyama “Towards a Generic Programming Model for Network Processors In Proc IEEE International Conference on Networks (ICON04), Singapore, November 2004.272 [11] R. Kokku, U. Shevade, N. Shah, H.M. Vin et al., Adaptive processor allocation in packet processing systems, University of Texas at Austin, Technical Report # TR04-04. [12] Motorola: C-5 Network Processor, Product Summary, 2002. [13] X. Zhu, Network processor directory, Gigascale Silicon Research Center, 2001, available at: http://www.gigascale.org/mescal/forum/110.html. [14] R. Kokku, T.L. Rich’e, A. Kunze, J. Mudigonda et al., A case for run-time adaptation in packet processing systems, ACM SIGCOMM Computer Communications Review, 34 (1), 2004, 107–112. [15] C. Tanougast, Y. Berviller, & S. Weber, Optimization of motion estimator for run-time-reconfiguration implementation, Proc. 7th Reconfigurable Architectures Workshop (RAW), May 1–5, Cancun, Mexico, 2001.
Important Links:
Go Back