EVENLY DISTRIBUTED RC INTERCONNECT ELO MODEL SIMPLIFICATION AND ITS SIMULATION

B. Wang, S.-G. Wang, and B. Yuan

References

  1. [1] K.D. Boese, J. Cong, K.S. Leung, & D. Zhou, On high-speed VLSI interconnects: Analysis and design, Proc. IEEE Asia-Pacific Conf. on Circuits and Systems, Sydney, Australia, 1992, 35–40.
  2. [2] C.P. Chen & D.F. Wang, Error Bounded Pad´e Approximation via bilinear conformal transformation, Proc. DAC-99, New Orleans, LA, 1999, 7–12. doi:10.1145/309847.309850
  3. [3] R.W. Freund, Reduced-order modeling techniques based onKrylov subspaces and their use in circuits simulation, in B.N. Datta (Ed.), Applied and computational control, signals, and circuits, 1 (Boston, MA: Birkhauser, 1999), 435–498.
  4. [4] Y. Liu, L.T. Pileggi, & A.J. Strojwas, Model order-reduction of RC(L) interconnect including variational analysis, Proc. DAC-99, New Orleans, LA, 1999.
  5. [5] L.T. Pillage & R.A. Rohrer, Asymptotic waveform evaluation for timing analysis, IEEE Transactions on Computed-Aided Design, 9(4), 1990, 352–366. doi:10.1109/43.45867
  6. [6] J. Phillips, L. Daniel, & L.M. Silveira, Guaranteed passive balancing transformations for model order reduction, Proc. DAC-02, New Orleans, LA, 2002, 52–57. doi:10.1145/513918.513933
  7. [7] M. Reed & R. Rohrer, Applied introductory circuit analysis for electrical and computer engineering (Upper Saddle River, NJ: Prentice Hall, 1999).
  8. [8] J.M. Wang, Q. Yu, & E.S. Kuh, Passive model order reduction algorithm based on Chebyshev expansion of impulse response of interconnect networks, Proc. DAC-00, Los Angeles, CA, 2000, 520–526.
  9. [9] S.-G. Wang, J. Wang, W. Cai, D. Zhou, & X. Zhen, Modeling of RC interconnect circuit and its recursive algorithm, Proc. IEEE 2002 Int. Conf. on Control and Automation (ICCA’02), Xiaman, China, 2002, 1426–1430.
  10. [10] B. Yuan, B. Wang, & S.-G. Wang, RC interconnect circuits and its balanced truncated models, Proc. IEEE 5th World Congress Intelligent Control & Automation, Hang zhou, China, 2004, 190–194.
  11. [11] D. Zhou, F.P. Preparata, & S.M. Kang, Interconnection delay in very high-speed VLSI, IEEE Transactions on Circuits and Systems, 38(7), 1991. doi:10.1109/31.135749
  12. [12] K. Glover, All optimal Hankel-norm approximations of linear multivariable systems and their L-error bounds, International Journal of Control, 39(6), 1984, 1115–1193. doi:10.1080/00207178408933239

Important Links:

Go Back