Experimental Results of an Analog VLSI Multiplier/Synapse /Transconductance Circuit

H. Chiblé

References

  1. [1] A.J. Annema, Feed forward neural networks: Vector Decomposition Analysis, Modelling and Analog Implementation (Kluwer Academic, 1995)
  2. [2] H. Chiblé, Analysis and design of analog microelectronic neuralnetwork architectures with on-chip supervised learning, doctoraldiss., University of Genoa, Genoa, Italy, 1997.
  3. [3] M. Valle, D.D. Caviglia, & G.M. Bisio, An experimental analogVLSI neural network with on-chip back-propagation learning,Analog Integrated Circuits and Signals Processing, 9, 1996,231–245.
  4. [4] H. Chiblé, Four quadrant multiplier for analog VLSI neuralnetworks, Lebanese Science Journal, 1 (2), 2000, 51–62.
  5. [5] G. Han & E.S. Sinencio, CMOS transconductance multipliers:A tutorial, IEEE Trans. on Circuit and Systems, 2: Analogand Digital Signal Processing, 45 (12), 1998, 1550–1563. doi:10.1109/82.746667
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  7. [7] E.A. Vittoz, Analog VLSI signal processing: Why, where andhow? Journal of VLSI Signal Processing, 8, 1994, 27–44. doi:10.1007/BF02407108
  8. [8] H. Chiblé & M. Valle, Behavioural evaluation of the analoghardware implementation of the back- propagation learningalgorithm using a neural simulator, Technical Report, Department of Biophysical and Electronic Engineering, University of Genoa, Italy, July 17, 1995.
  9. [9] G.M. Bo, D.D. Caviglia, H. Chiblé, & M. Valle, A circuit architectures for on-chip learning, Analog Integrated Circuits & Signals Processing, 18, 1999, 163-173. doi:10.1023/A:1008307321196

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