A FAULT-TOLERANT SENSORLESS APPROACH IN FIVE-LEVEL PACKED U CELLS (PUC5) MULTILEVEL INVERTER

Dhananjay Kumar,∗ Rajesh K. Nema,∗ Sushma Gupta,∗ and Niraj K. Dewangan∗

Keywords

Multilevel inverters (MLI), packed U cells (PUC), fault tolerance (FT), open circuit (OC), reliability

Abstract

In this paper, a modified structure of fault-tolerant (FT) operation has been designed for the five-level packed U cells (PUC5) multi- level inverter (MLI). The sensorless self-capacitor voltage balancing control is designed to regulate the voltage across the capacitor at the half magnitude of the DC source value in creating a symmet- rical five-level output voltage waveform. Moreover, the sensorless self-capacitor voltage balancing control reduces the complexity and improves the reliability of the system. Also, the proposed FT-PUC5 structure is considered and analysed for the open circuit (OC) fault in the switches. Based on a comparative analysis of the five-level PUC5 MLI and the proposed fault tolerance, the PUC MLI struc- ture is presented. It has less number of devices in comparison with the most recent FT topologies. Moreover, this proposed single- phase and three-phase FT-PUC5 structure is established under before-fault, during-fault and after-fault operation using software MATLAB/Simulink. The proposed single-phase and three-phase FT-PUC5 structure is validated through an experimental prototype using the dSPACE DS-1104 real-time controller.

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