A High-Yield Process and Low-Noise Structure for Silicon Neural Probe

S.J. Oh, J.K. Song, J.W. Kim, and S.J. Kim (Korea)

Keywords

silicon neural probe, neural prosthesis, power spectradensity , neural recording

Abstract

This paper focuses on the design and fabrication of the silicon neural probe with two improvements: the design of process for improvement in fabrication yield and the integration of ground layer for reduction of electromagnetic noise. First, we have found that the fabrication yield is determined by a wet-etch step for bulk micromachining on back side of wafer. For the purpose of improve fabrication yield, a design of mask was modified that all probes are linked by micro tabs located between probes and bars on the wafer. The micro tab was used to hold probes on wafer during wet-etch. Second, insertion of an internal ground layer located below interconnection was found to dramatically reduce the electromagnetic noise. Result was described that this probe showed a favorable performance with respect to impedance spectra, noise reduction and acute neural recording. Measured power spectral density (PSD) of noise in recorded signals showed a 55dB reduction of noise at 120Hz, which is on of the harmonic frequency of 60Hz interference. These silicon-based electrode techniques provide the advanced technology for obtaining high-performance neural interface.

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