W.M. Haider, J. Ortega, and A.F. Díaz (Spain)
Hardware description language (HDL), LAWS and EMOmodels, network interfaces, protocol offloading, protocolonloading.
This paper analyzes two alternatives to optimize the network interface performance that take advantage of the interface tasks parallelization among the different processing cores available in the server nodes. The first alternative corresponds to the implementation of the main part of the communication tasks on a processor located in the NIC (offloading), while the second one considers the use of cores on a CMP or SMP to execute the network interface (onloading). Our approach to evaluate and compare the considered alternatives is based on simulation of their corresponding HDL (Hardware Description Language) models. The obtained experimental results have been explained by using the previously proposed LAWS and EMO theoretical models.
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