M. Pelcat, P. Menuet, S. Aridhi, and J.-F. Nezan (France)
Real-time systems, embedded systems, static scheduling,synchronous dataflow graph, algorithm architecturematching
As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing interest. This scheduling consists of statically distributing the tasks that constitute an application between available cores in a multi-core architecture in order to minimize the final latency. This problem has been proven to be NP-complete. A static scheduling algorithm is usually described as a monolithic process, and carries out three distinct functions: choosing the core to execute a specific function, choosing the medium to transfer a specific data block and evaluating the cost of the generated solutions. This paper describes a scheduling framework which splits these functions into reusable sub-modules. This division produces a new level of scalability in terms of schedule quality and computation time, thus enabling the combination of several scheduling heuristics with different architecture models.
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