M. Barai, S. SenGupta and J. Biswas (India)
Edge-triggered, Hybrid DPWM, Dual Mode, Digital Con troller
This paper presents an edge-triggered, dual mode 8-bit hy brid Digital Pulse Width Modulator (DPWM) which con sumes very low power and provides dual switching fre quencies. Switching frequency of an 8-bit hybrid DPWM proposals in current literature, is limited to 15 MHz, mainly because of hardware timing constraints. Hardware tim ing constraints at high frequency is addressed by intro ducing edge-triggered and dual mode operation of two clock-domain hybrid DPWM architecture. This proposal achieves high resolution at high frequency and consumes low power. An 8-bit hybrid DPWM consumes 32.57% less power in dual mode compared to an 8-bit normal hybrid DPWM. This proposal achieves dual switching frequencies of 160MHz and 10 MHz. The proposed design is imple mented on an Altera DE2 FPGA setup and is also imple mented in 0.5 µm CMOS technology. Edge-triggered, dual mode hybrid DPWM improves dynamic and steady state performances of the digital controller used in power man agement applications.
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