Y. Kawakami, M. Fukui, and S. Tsukiyama (Japan)
power grid optimization, timing violation, process variation, IR drop, electro migration
With the advent of super deep submicron age, the circuit performance is strongly impacted by process variation. A Power grid optimization which considers the timing error risk caused by the variation becomes very important for stable and high-speed operation of systems. Conventionally, a lot of power grid optimization algorithms have been proposed, and most of them use the IR drop as their objective function. Since IR drop influences the circuit delay, from a timing point of view, IR drop might not necessarily direct metric for the real goal of the design. In this paper, we propose an approach which uses the "timing error risk caused by IR drop" as a direct objective function. New optimization method with the risk function of our proposal obtains equal quality results by the best results in many trials of our conventional approach. Experimental results show the effectiveness.
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