Architecture Level Simulation of IEEE 802.11n MAC using SystemC

S.-R. Yoon and S.-C. Park (Korea)


IEEE 802.11n MAC, SystemC simulation


This paper proposes a method to simulate the system architecture of IEEE 802.11n MAC. Transaction level modeling(TLM) of bus based SoC platform is used as design approach. Various architectural options such as processor and bus clock speeds, memory response time, and memory size are evaluated with application specific performance metrics. The architecture is verified using the real-time constraints of IEEE 802.11n. In addition, further architecture analysis is performed to evaluate performance metrics in terms of the average and instantaneous throughput.

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