Y. Dong, Y. Dou, and M. Liu
Window operations, three-level memory structure
Window operations which are computationally intensive and data intensive are frequently used in image compression, pattern recogni- tion and digital signal processing. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these algo- rithms. In this paper, we design a three-level memory structure to realize inner-loop and outer-loop data reuse in window operations completely, and use shifted registers to make hardware design sim- pler. Then, we present a design space exploration algorithm to get a high-performance design without going through the time-consuming hardware design process for each diļ¬erent algorithm. By finding the three upper bounds according to area constraints, memory bandwidth constraints and on-chip memory constraints, the block structure of the design which can fully utilize the available resources on the board is determined.
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