Results on Leakage Power Management in Scratchpad-based Embedded Systems

F. Menichelli and M. Olivieri (Italy)

Keywords

Scratchpad memories, low power embedded systems, leak age power.

Abstract

Static power consumption due to leakage current is gain ing importance in the power balance of present and future CMOS devices, so that it cannot be neglected in power critical embedded system design. A hierarchical organization of memories has been demonstrated to be a very effective approach to reduce dy namic power consumption in a number of previous works, in particular through the use of scratchpad memories. While dynamic power savings through scratchpad memory architectures have been analyzed and quantified in specific architecture designs, an analogous quantification of static (i.e. leakage) power savings has not been presented yet. In this work we quantify static/dynamic power saving in a state-of-the-art low-power embedded architecture and give a quantitative projection of relative power saving for future technologies.

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