Implementing a Multiple-Instruction-Stream Associative MASC Processor

H. Wang and R.A. Walker (USA)


SIMD, multiple SIMD (MSIMD), associative computing, processor array, processor design, FPGA.


For search-intensive applications such as data mining and bioinformatics, a SIMD Processor Array on a Chip may be an effective architecture, and if the application is control-intensive, a Multiple SIMD (MSIMD) architecture may further increase processor utilization. In this paper, we describe the implementation of an associative MSIMD architecture on the MASC Processor. The MASC Processor implemented using FPGAs, is easily scalable, and dynamically assigns tasks to Processing Elements as the program executes.

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