Preliminary Evaluation of Martini: A Novel Network Interface Controller Chip for Cluster-based Parallel Processing

K. Watanabe, J. Yamamoto, J.-I. Tsuchiya, N. Tanabe, H. Nishi, T. Kudoh, and H. Amano (Japan)

Keywords

Network Interface Controller, PC Cluster, Preliminary Evaluation

Abstract

In this paper, a network processor for low latency, high bandwidth communication, called Martini, is introduced. Martini can be used as a network interface card (NIC) controller LSI for PCI-based and DIMM slot-based NICs. Martini is equipped with up to a 10Gbit/s high speed link interface. Martini is a 0.14µm CMOS embedded array. A total of 538kbyte of high speed embedded memory and 1490k basic cells are provided on the chip.

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