New PLL Approach Considering Unbalanced Line Voltage Conditions

P. Rodríguez, J. Bergas, and L. Sainz (Spain)


Phase and Voltage Imbalances, Phase-Locked Loop, Utility Interface, Custom Power.


This paper presents a fast, precise, robust positive sequence voltage detector working under unbalanced utility conditions. This detector utilizes a new “synchronous double reference frame PLL” (SDRF-PLL) that completely eliminates the existing errors in conventional synchronous reference frame PLL systems (SRF-PLL) when imbalance on the source side is present. In this paper, an analytical study and verification by simulation are conducted.

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