D. Sigüenza-Tortosa and J. Nurmi (Finland)
: Network-on-Chip, network modelling &simulation.
The purpose of this paper is to present the basic ideas behind the development of our Network-on-Chip (NoC) architecture, called “Proteo”. In an Intellectual Prop erty (IP) based design methodology the interconnection structures may be treated as IPs. The Proteo project is aimed at creating a library of pre-designed communica tion blocks that can be selected from a component li brary and configured by automated tools. The network implements packet switching in a hierarchical topology. A NoC needs a considerable amount of resources that can be shared with other system level tasks, like power saving and fault-tolerance mechanisms.
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