J.S. Prasad (India)
Cyclic Redundancy Check, Polynomial Specific Cyclic Redundancy Check, Algorithm, Bluetooth, Mobile Computing and VLSI
Cyclic redundancy check is a traditionally used error detection method in networks. This paper proposes an algorithm that generates another algorithm. The produced algorithm calculates cyclic redundancy check using a predefined polynomial. CRC modulo-2 division operation and uses a polynomial as an input. The proposed algorithm works when the polynomial is in the form )( 4 0 ∑ − = + N i i i N XCX . The proposed algorithm takes a polynomial as input and produces another algorithm. The produced algorithm calculates CRC for a given input stream of bytes. The algorithm is more useful under memory constrained conditions. This paper also describes existing cyclic redundancy check (CRC) methods. Proposed algorithm is been compared with the existing algorithms. The algorithm reduces number of data exchanges between register variables and cache memory. The proposed algorithm reduces the amount of data transfers from cache memory. Hence the algorithm is faster than the existing algorithms. The algorithm is more useful in areas of applications like micro-controller applications; blue tooth enabled services, mobile services, VLSI technologies in which available cache and EEPROM memory is limited. The cyclic redundancy check is also used in file integrity checking.
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