A Scalable Pipelined Associative SIMD Array with Reconfigurable PE Interconnection Network for Embedded Applications

H. Wang and R.A. Walker (USA)


SIMD, Associative Computing, Reconfigurable Network, Embedded Systems, String Matching


This paper describes the FPGA implementation of a specialized SIMD processor array for embedded applications. An alternative to traditional SoC or MPSoC architectures, this array combines the massive parallelism inherent in SIMD architectures with the search capabilities of associative computing, producing a SIMD Processor Array System on a Chip (PASoC) well suited for applications such as data mining and bioinformatics. This paper first describes the architecture of the system, and then the pipelining of the processing elements and the addition of a reconfigurable interconnection network. Finally, the paper concludes with a brief description of a string-matching algorithm that can be used for the applications cited above.

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