D. Wallin, H. Zeffer, M. Karlsson, and E. Hagersten (Sweden)
Vasa, Simics, Full-System Simulation, Multiprocessor
This article presents Vasa, a configurable high-performance multiprocessor simulation package for the Virtutech Sim ics full-system simulator. Vasa includes models of multi level caches, store buffers, interconnects and memory con trollers and can model complex out-of-order SMT/CMP processors in great detail. However, it can also be run in two less detailed simulation modes being up to 287 times faster on average. We compare the simulation results from a 16-way cache coherent multiprocessor system with four 4-way SMT/CMP processors in the three simulation modes. Our results indicate that for many architectural studies, it is jus tifiable to run the simulations in a faster less detailed mode as long as it is not the behavior of the processor itself or the first level caches that is being studied.
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