H. Al-Asaad (USA)
Global fault collapsing, fault simulation, physi cal fault testing.
Fault collapsing is the process of reducing the number of faults by using redundance and equivalence/dominance relationships among faults. Exact fault collapsing can be easily applied locally at the logic gates, however, it is often ignored for most circuits, due to its high demand of resources such as execution time and/or memory. In this paper, we present EGFC, an exact global fault collapsing tool for combinational circuits. EGFC uses binary deci sion diagrams to compute the tests for faults and conse quently achieve efficient global fault collapsing. Experimental results show that EGFC reduces the number of faults drastically with feasible resources.
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