M. Olivieri, F. Pappalardo, and G. Visalli (Italy)
Bus transfer, Encoding, Power demand, Optimization methods, Monte Carlo methods
The Bus Switch mechanism is a recently proposed bus encoding technique for low-power off-chip data buses. The approach is based on clustering, reordering and encoding the bus input lines according to a reordering pattern and a fixed coding function. This work presents a statistical approach for reducing the hardware overhead of the bus switch technique, by operating with a sub-set of the possi ble reordering patterns. We demonstrate the effectiveness and robustness of the proposed approach by ANSI C simulations, measuring the average switching activity savings. Our results show a modest switching activity degradation while saving 90% computation time, thus obtaining a sub-optimal encoder configuration satisfactory for a large variety of benchmarks.
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