Improved Speed Rate in Current Mode Algorithmic ADC

V. Tipsuwarnpron, P. Roengruen, W. Chuchotsakunleot, and S. Maitreechit (Thailand)


Algorithmic ADC, VLSI, Injection current, Quantizing level, Power consumption, Speed rate


A low power current-mode analog to digital converter suitable for equipment are required low voltage, low power (ADC). It uses a quartzite level with current injection technique to increase the speed of current mirrors. And this method to reduce the required input signal for a given range and higher operating speeds. In this paper, the feasibility of current-mode algorithmic ADC is demonstrated and advantages of various 2 techniques for use in the converters are considered. Experimental results for 4-bits algorithmic ADC using a 0.8 mµ CMOS technology are reported, including power consumption.

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