M. Raseen, P.W.C. Prasad (UAE), and S.M.N.A. Senanayake (Malaysia)
: Reduced Ordered Binary Decision Diagram (ROBDD), XOR/XNOR min-terms, Boolean Function
The way of representing Boolean functions has a great influence on VLSI computation time and memory requirements. The need for analyzing the complexity behavior of different logic representations becomes growing importance. Last few decades the XOR/XNOR gates are fully exploited as a potential candidate for incorporation into the design in addition to the AND and OR gates. This paper discusses the complexity behavior of XOR/XNOR min-terms. We propose a novel method to analyze their effectiveness in Reduced Ordered Binary Decision Diagram (ROBDD) representation. Theoretical and Practical results are reported to underline the efficiency of this approach.
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