H. Harmanani and A. Hajar (Lebanon)
Testable Synthesis, Test Scheduling, Genetic Algorithms
This paper presents a new efficient method for concurrent BIST synthesis and test scheduling in high-level synthe sis. The method maximizes concurrent testing of modules while performing the allocation of functional units, test registers, and multiplexers. The method is based on a ge netic algorithm that efficiently explores the testable design space. The method was implemented using C++ on a Linux workstation. Several benchmark examples have been im plemented and favorable design comparisons are reported.
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