T. Minowa (Japan)
Turbo codes, TTCM, FPGA, logMAP decoder, VHDL.
The architecture and design of turbo trellis-coded modu lation (TTCM), a powerful parallel concatenated convolu tional code, is explained in this paper. The TTCM decoder architecture consists of a set of specialized blocks for the main tasks (logMAP decoding, depuncturing, interleaving and deinterleaving) and a controller block for the schedul ing tasks. The TTCM design has been written in synthesiz able hardware description language (HDL), and finally has been prototyped onto a system based on an FPGA.
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