An Application-oriented Analysis of Power/Precision Trade-off in Fixed and Floating-Point Arithmetic Units for VLSI Processors

F. Pappalardo, G. Visalli, and M. Scarana (Italy)

Keywords

Fixed point arithmetic, Floating point arithmetic, Power demand, Signal processing, Very-large-scale integration.

Abstract

Floating and fixed-point formats represent the most used representation in VLSI DSP systems. Fixed-point formats are often preferred for lower power and faster operation, when the algorithm permits the appropriate scaling fac tors. Floating-point formats require additional hardware and power, but guarantee better precision performance. This work compares the energy dissipated by the key arith metic units in DSP systems, addition and multiplication, in both floating- and fixed-point scenarios, also consid ering reduced precision and power-aware architecture so lutions. The evaluation has been performed referring to STMicroelectronics 180nm,130nm and 90nm CMOS pro cesses. The results show that specialized floating-point for mats can be the best energy-efficient solution in low power DSP.

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