Design and Implementation of a Reconfigurable Polyphase-FFT System

H. Ho, V. Szwarc, and T. Kwasniewski (Canada)

Keywords

Polyphase-FFT algorithm, Multicarrier, reconfigurable architecture, system-on-chip

Abstract

A reconfigurable system design and implementation of Polyphase-FFT circuits for multicarrier wireless applications is presented. The proof of concept circuit realization can be configured to compute IFFT-Polyphase or Polyphase-FFT algorithms for 8, 16, and 32 subcarriers. Furthermore, the system-on-chip circuit can be configured for full-duplex operation and can implement both IFFT-Polyphase and PolyphaseFFT algorithms for 8 or 16 subcarriers. The throughput, hardware requirements, and power consumption for the reconfigurable circuits are presented and compared with conventional realizations.

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