F. Rios-Gutiérrez and R. Alba-Flores (USA)
Fault-Tolerant, Dynamic-Redundant, Low-Cost, Microprocessor
In this paper, the design and implementation of a low cost, self-testing, fault-tolerant microprocessor system is presented. The system was implemented using an architecture based on the dynamic redundancy technique for the hardware, and supported by the application of software and time redundancy techniques. The final system that was obtained is highly reliable and can be used for control applications where reliable continuous execution is paramount, and the cost and power consumption is important.
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