M.N. Cirstea, M. Trbojevic, S.E. Cirstea, T.J. Coggins, and M.M. Al-Akaidi (UK)
FPGA, VHDL, SDH Networks, microprocessor.
The paper presents the research investigation carried out on the implementation of digital communication Traffic Functions into Field Programmable Gate Arrays (FPGAs), to replace microprocessor functions. The analysis of communication networks features and characteristics of the Synchronous Digital Hierarchy (SDH) standard, the implementation devices - microprocessors and Field Programmable Gate Arrays (FPGAs), methods of implementation and hardware prototyping are presented. The Add-Drop-Multiplexer (ADMUX) unit, as a part of the Synchronous Digital Hierarchy network, was investigated. To achieve a new system, of higher performance, a replacement configuration, including Motorola MCF5407, Universal Asynchronous Receiver/Transmitters, Traffic Card and CPLDs/FPGAs was proposed. The VHDL models of the subsystems were developed, together with their testbenches, and then a Prototype Card was designed, manufactured and tested. The components count was reduced, the overall system performance was improved and the experimental tests have validated the new design.
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