L. He and Z. Liu (PRC)
SMT, branch predictor, value prediction
Simultaneous Multithreaded (SMT) processors improve the instruction throughput by allowing fetching and run ning instructions from several threads simultaneously at a single cycle. With the pipeline deepening and issue widths increasing, the branch predictor plays a more important role in improving the performance of an SMT processor. Although the existing branch predictors have presented a high prediction accuracy, the complexity of their imple mentation and the hardware overhead of them are very large for SMT processors. In this paper, we present a sim ple and effective value based branch predictor for SMT processors. The predictor is easy to be implemented, and needs less hardware than that of all the other dynamic pre dictors we consider. Execution-driven simulation results show that our predictor outperforms many predictors in lit erature. The performance speedup of our predictor over the best predictor considered is 13% on average. The branch prediction miss rates and the instruction rates fetched along the wrong path are decreased.
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