A Simple Zerotree Encoder Architecture based on MPEG-4 Texture Coding

C. Xu, X. Fan, and Y.M. Yang (PRC)


Video coding, MPEG-4 zerotree encoding, Architecture, Multi-bit-plane parallel


This paper presents a novel zerotree encoder architecture based on MPEG-4 zerotree encoder. It develops a parallel processing of multi-bit-planes, and avoids the recursive processing. The parallel processing of multi-bit-planes is supported with a simple preprocess unit. The recursive processing is removed completely through two techniques. One is exploiting the feature of the MPEG-4 zerotree encoding symbol alphabet; the other is employing the clearing processing of significant coefficients instead of the original skip processing. The compression performance is changed slightly due to the clearing processing. However, it becomes a little better than that of MPEG-4 zerotree encoder when PSNR is below 37dB around. Using the technique can save more than 20% of circuit resource and computation time.

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