Implementation of Efficient Wavelet Image Compression Algorithms using Reconfigurable Devices

E.J. Balster, W.W. Smari, and F.A. Scarpino (USA)


Image Compression, Wavelet Transforms, FPGAs, Performance of algorithms.


Image compression using wavelets has proven to be a useful design tool for achieving large compression ratios while preserving reconstructed image quality. However, wavelet image compression has traditionally been an expensive process in terms of computation time. In the new digital era, multimedia data requirements are exceeding the available transmission bandwidths, and high quality image compression techniques are needed to store and transmit the ever-growing image data files. Also, real-time applications such as video teleconferencing (VTC) and digital television (DTV) require image compression techniques that can compress and decompress images quickly and efficiently. This paper presents a wavelet compression solution using FPGAs for real-time applications. The inherently parallel operation of FPGAs and other configurable hardware devices make them a natural progression in the race for faster computation. Dedicated hardware can execute many operations simultaneously, thus allowing it to achieve large overall throughput. Thus, a new efficient wavelet compression scheme is developed to utilize the parallel operation of configurable hardware devices. This efficient algorithm allows wavelet transformation, scalar quantization, and hard thresholding of expansion coefficients to occur in parallel. Thus, overall compression time is reduced. Furthermore, the fast computation of the efficient compression algorithm is demonstrated successfully through a real-time VTC application over the Internet.

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