A. Marcianesi, L. De Marchi, M. Montani, and N. Speciale (Italy)
Denoise, Time-Frequency Signal Analysis, Wavelet Packet, FPGA
In this work we present two Field Programmable Gate Ar ray (FPGA) implementations of an algorithm for signal de tection and denoising based on undecimated (Stationary) Wavelet Packet Transform (SWPT). The former exploits the symmetry of the orthogonal filters used in the wavelet transformation, the latter is based on lifting scheme. Both the architectures are easily reconfigurable and able to redi rect the analysis to different wavelet packet domains per forming a real-time analysis. We considered filter coeffi cients quantization and finite word length effects in order to limit the signal-to-noise ratio (SNR) penalty, due to quan tization noise, in the hardware implementation, obtaining good matching between FPGA and floating point simula tion. Hardware performances are provided together with the simulation results.
Important Links:
Go Back
