The Connex ArrayTM as a Neural Network Accelerator

R. Andonie and M. Malita (USA)

Keywords

Hardware neuro-computing, parallel computing, parallel architecture.

Abstract

We discuss the parallel implementation of neural networks on a Connex ArrayTM circuit. By estimating the number of memory cycles, we approximate the real performance of the machine. We show how to implement a basic neural learning algorithm. Our preliminary study suggests that the Connex ArrayTM is a good neural network accelerator, due to its high performance for vector operations. The execu tion time obtained is signi´Čücant: 5 GCUPS, at 2.5 watts, on less than 1 cm2 area.

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