Trimming Methodologies for Compensating Process Variation Errors in Second-Order Bandgap Voltage Reference Circuits

R. Paul (India), F. Nome (USA), A. Patra (India), and B. Culpepper (USA)

Keywords

Bandgap Voltage Reference, PTAT, CTAT, Temperature and Process Compensation, Post Fabrication Trimming design, Bipolar Devices.

Abstract

This paper presents an investigation into the methodologies of low cost room temperature trimming that can improve the performance of on-chip second order bandgap voltage reference circuits over process variations and samples. A good second-order reference designed to perform better than a simple first-order reference over temperature may exhibit worse test results if the process variation errors are ignored and not properly addressed through post-fabrication trimming design. Two different trimming methodologies, one using the best bandgap voltage and the other using the best trim-code among tested samples have been investigated and reported in this paper. The latter technique has been found to give better results. The second-order bandgap circuit is designed in a 0.5┬Ám BiCMOS process with opamp structure to study the additional effect of trimming the input offset error of the opamp.

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